๐ About Me
I am a undergradute majoring in computer engineering at uw-madison. My interests lie in energy efficent neural network inference ASIC design.
๐ Education
- University of Wisconsin-Madison, College of Engineering
Bachelor of Science, Computer Engineering (Machine Learning Specialization), Computer Science Minor
GPA: 3.86/4.0
Expected Graduation: 2026
๐ฌ Projects and Experiences
- Developed an ASIC on the AMD Xilinx platform for a scaled-down 50M Llama 2 model using a systolic array optimized for INT8 quantization in SystemVerilog.
- Implemented the Llama 2 architecture from scratch in C, leveraging an ARM Cortex microprocessor.
- This architecture increased power efficiency by offloading intensive matrix multiplications, allowing the ARM chip to focus on general system operations.
Pipelined RISC CPU Repo
- Designed, in collaboration, a 5-stage pipelined MIPS CPU in Verilog with control, data hazards prevention and exception handling.
- Integrated a two-way set-associative cache with four-banked memory and optimizations like bypassing, forwarding, and branch prediction to minimize pipeline stalls.
Autonomous Robot Chip Synthesis Repo
- Worked in a team of four, under Eric Hoffmanโs guidance, to design an autonomous robot capable of executing the entire Knightโs Tour on a chessboard, entirely at the RTL level.
- Employed a PID controller with PWM for precise movement and positioning. Utilized UART and SPI interfaces for effective communication between the robotโs components and the microprocessor.
- Simulated and Synthesized on Intel Quartus and Synopsys using a 32nm library. Applied PVT and low-level constraints, optimizing the design and meeting max and min delay slack with clock uncertainty.
๐ Advanced Courses Iโve Taken
- ECE 551: Digital Design and Synthesis
- ECE 552: Computer Architecture
- ECE 532: Matrix Methods in Machine Learning
- CS 577: Introduction to Algorithms
- ECE 352: Digital System Fundamentals
- ECE 354 : Machine Organization and Programming (The C language)
๐ Skills
- Languages: SystemVerilog, Python, C++, C
- Tools: Synopsys Design Vision, ModelSim / Questa , PyTorch, Tensorflow
- Core Competencies: ASIC Design, Digital System Design, CPU Architecture, Machine Learning Algorithms, Neural Network Inference Optimization